1. Technical Field
The present invention relates generally to an apparatus and method for performing a compression operation in a hash algorithm and, more particularly, to an apparatus and method for performing a compression operation in a fast message hash algorithm, which receive a 512-bit message and 512-bit chaining variable data, repeatedly calculate a 128-bit register-based step function, and then produce updated 512-bit chaining variable data which is a basis for the hash value.
2. Description of the Related Art
The provision of integrity of messages is the principal function of a cryptographic application for performing communication between various types of devices and storing the data of the devices. A hash function is a function for guaranteeing the integrity of messages, which is widely used in the signature, authentication, etc. of messages. Generally, in a hash function, chaining variable data is used, and is updated in such a way that a message is divided into units of a specific length and individual message units are input, together with the chaining variable data, to a compression function. Final chaining variable data output from the compression function is processed by various algorithms and then becomes a hash value for the corresponding message.
In relation to this, Korean Patent No. 10-0916805 entitled “Hash algorithm having 256-bit output” presents a hash algorithm technique for calculating a chaining variable by receiving a message bit stream having a predetermined length, converting the bit stream into a word stream, converting an input message into preset bits, and performing a compression operation.
In order to improve the speed efficiency of such a hash function, there is a need to design a compression function which is a core algorithm of the hash function so that the compression function can be optimally implemented for a chip or a Central Processing Unit (CPU) specified for a cryptographic application.